1. Field Of The Invention
The present invention relates to a system and method for optimizing access to a paging store in a data processing system including a central processing main store. The system is adapted for transferring data between the main store and paging store via an input-output channel and a control unit.
2. Statement Of The Problem
In contemporary data processing systems data transfers, between a main store associated with one or more central processing subsystems and a secondary backing store, are carried out via an input-output (I/O) channel associated with the main store and a control unit associated with the secondary store. Such transfers are controlled by channel command words (CCWs) stored in the main store, and are routed between specified storage areas in the secondary store and main store. These areas are usually specified by plural sequentially chained CCWs; a first such CCW specifying a record location in the secondary store and another CCW chained to the first CCW defining a boundary location of a corresponding area in main store and a transfer operation between the two stores.
In respect to certain secondary stores all such data transfers are conducted in discrete block units of predetermined "page" length (e.g. 4,096 bytes). Such secondary stores are termed "paging stores".
For such transfers the I/O channel requires a predetermined minimum amount of time to execute command chaining operations, for linking the CCW which defines the page location in the paging store to the CCW which defines the other parameters of the transfer operation. This time depends on the direction of the transfer operation and the time required by the channel to obtain access to the main store assuming it is not delayed by contention. The paging store usually exhibits delays, for instance due to latency, which come into play only after the chaining reselection by the channel and are thereby additive in relation to the chaining delay of the channel.
Accordingly, in systems requiring fast access to data in a paging store these delays may severely limit performance. The paging store may be implemented out of high speed electronic components such as charge coupled devices (CCDs). However, even such stores inherently exhibit non-negligible delays due to regeneration activities, and, when organized for sequential access, due to latency.
A known "roll mode" addressing technique (refer for instance to U.S. Pat. Nos. 2,840,304, and 3,341,817 discussed below under "Description of the Prior Art") permits latency delays of such paging stores to be reduced by allowing each transfer to start at a variable position within a page (or block), proceed to an end boundary of the page, link to the beginning of the page, and continue to and terminate at a position immediately preceding the starting position.
However, in conventionally organized systems the operations associated with preparing for such transfers--e.g. validity checking of the page location parameters and establishment of a suitable "roll mode" starting position in the paging store--would be referred in time to a channel signal for starting the transfer of data. Accordingly, even when operating in roll mode, such a system would be limited in performance by the non-negligible delay of the central system channel in preparing the transfer command.
Accordingly the present invention concerns a method and apparatus for substantially reducing the delays associated with preparation for such page transfer operations.
3. Description Of The Prior Art
A co-pending U.S. Pat. application Ser. No. 973,826 filed Dec. 28, 1978 and assigned to the Assignee of the present application entitled "A Command Pair To Improve Performance And Device Independence", describes a method for facilitating exchanges of fixed length data records between a DASD and a CPU. The channel uses a first CCW to transfer information to the control unit defining a multiple record boundary ("extent"), a second CCW to define the location of a specific record storage area in the DASD, and a third CCW to define a counterpart area in CPU main storage and a transfer operation to be conducted between the DASD and main storage areas. The control unit signals the end of the operation associated with the first CCW before its actual completion so that a boundary validation operation in the control unit (associated with the first CCW) is effectively overlapped in time with central system channel operations for preparing the second CCW.
A number of patents and publications describe roll mode operations as characterized above. These include: U.S. Pat. No. 2,840,304 to F. C. Williams, issued June 24, 1958 and assigned to National Research and Development Corp.; U.S. Pat. Nos. 2,925,587 and 2,913,706, both to R. Thorensen et al, assigned to Secretary of Commerce, U.S.A.; U.S. Pat. No. 3,341,817 to J. C. Smeltzer, assigned to Bunker-Ramo Corp.; U.S. Pat. No. 3,654,622 to W. F. Beausoleil et al, assigned to the Assignee of the present application; IBM Technical Disclosure Bulletin Vol. 13, No. 1 June 1970, pages 93-95, "Transparent Roll Mode For Rotating Device" by D. A. Stevenson.
A number of patents disclose central processors, channels and control units of the type generally contemplated herein as environmental elements of a system in which the present invention may be conveniently practiced. These include: U.S. Pat. No. 3,400,371 to G. M. Amdahl et al, issued Sept. 3, 1968 and assigned to the Assignee of the present application, which shows a data processing system having channel facilities; U.S. Pat. No. 3,488,633 to L. E. King et al, issued Jan. 6, 1970, and assigned to the Assignee of the present application, which shows I/O channel apparatus for a data processing system of the type described in said Amdahl et al patent; U.S. Pat. No. 3,303,476 to J. T. Moyer et al, issued Feb. 7, 1967 and assigned to the Assignee of the present application, which shows an I/O control unit which may be used in the system described in said Amdahl et al patent; and U.S. Pat. No. 3,336,582 to W. F. Beausoleil et al, issued Aug. 15, 1967 and assigned to the Assignee of the present invention, which discloses details of a communication interface between a channel and a control unit in a system of the type disclosed in said Amdahl et al patent. The disclosures of said Amdahl et al, King et al, Moyer et al and Beausoleil et al patents are incorporated herein by this reference.